Embedded super flash memory cells are used in certain integrated circuits, where the embedded super flash memory cells can be erased and re-programmed. There are at least three generations of super flash memory cells, where each generation is smaller than the previous. The third generation memory cells include a stack with a control gate overlaying a control gate dielectric that in turn overlies a floating gate, where the floating gate overlies a floating gate dielectric. The entire stack overlies a substrate.
Many processes are included in the production of such integrated circuits, such as lithography, etching and deposition. Lithography involves the deposition of a photoresist layer followed by patterning of that photoresist layer. The photoresist layer can be patterned by exposure to light or other electromagnetic radiation through a mask with transparent sections and opaque sections. The light causes a chemical change in the photoresist such that either the exposed portion or the non-exposed portion can be selectively removed. Lithography techniques are expensive, so integrated circuit production techniques that include more lithography processes tend to be more expensive than those with fewer lithography processes.
Accordingly, it is desirable to provide methods of producing integrated circuits with fewer lithography processes than traditional production methods. In addition, it is desirable to provide methods of producing integrated circuits with embedded super flash memory cells while reducing the number of lithography processes compared to traditional production processes. Furthermore, other desirable features and characteristics of the present embodiment will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.